Abstract:

Modern network processors (NPs) are highly multithreaded chip multiprocessors (CMPs), supporting a wide variety of mechanisms for on-chip storage and inter-task communication. Real network processor applications are hard to program and must be tailored to fit the resources of the underlying NP, motivating an automated approach to mapping multithreaded applications to NPs. In this paper we propose and evaluate compiler-based automated task and data management techniques to scale the throughput of network processing task graphs onto NPs. We evaluate these techniques using a NP simulation infrastructure based on realistic NP applications, and present an approach to discovering performance bottlenecks. Finally we demonstrate how our techniques enhance throughput-scaling for NPs.

Published:

"Scaling Task Graphs for Network Processors"
Martin Labrecque and J. Gregory Steffan
IFIP International Conference on Network and Parallel Computing, Tokyo, Japan, October, 2006.

Download:

• Scaling Task Graphs for Network Processors (PDF)

BibTeX Entry:

@INPROCEEDINGS{scaling06,
  author = {Martin Labrecque and J. Gregory Steffan},
  title = {Scaling Task Graphs for Network Processors},
  booktitle = {IFIP International Conference on Network and Parallel Computing},
  year = {2006},
  address = {Tokyo, Japan},
  month = {October},
}